The R8000 microprocessor is a superscalar implementation of the MIPS architecture. The floating-point compute oriented processor uses a superscalar machine organization that dispatches up to four instructions each clock cycle to two floating-point execution units, two memory load/store units, and two integer execution units. A split level cache structure reduces cache misses by directing integer data references to a 16-Kbyte on-chip cache while floating-point data references are directed off chip cache of up to 16-Mbytes. Limited out-of-order execution is supported for floating-point operations. The overall goal of this implementation is to efficiently support large real world floating point intensive applications with microprocessor technology.
The Indigo2TFP and Power Challenge M (D-75301-S2-1) are the R8000-ready Indigo2 products. These products address the needs of heavy computational users with extreme performance. The new MIPS R8000 processor module provides two integer and two floating point units with 2MB of global streaming cache. The product integrates a new MIPS R8000 processor module, IP26 mother-board and requires an newer revision power supply. These products are available as systems and upgrades (HU-TWOTFP) to existing platforms. This architecture requires the use of the new 64-bit IRIX called 6.0.1 .
This Customer Support Engineering document provides New Product Information for the R8000 processor (IP21 board) for Power Challenge, Power Onyx and Power Onyx Extreme. This hardware requires the IRIX 6.0 Operating System. (400 lines)